vhdl - FATAL_ERROR: Iteration limit 10000 is reached -

it on 2 weeks faced probem, im programming artix 7 fpga. process simple:

• a serial module receive 2 bitstreams(2 bytes)
• demux module according these 2 bytes enable 2 bits in array puf_en

when add demux module whoe design, during simulation receive error: fatal_error: iteration limit 10000 reached.

the code demux here:

    puf_state_process:process(clk,uart_read,puf_signal,uart_read_flag) begin     if (rising_edge(clk))         if (uart_read="11111111") then-- means reset                                 stop_s<='0';                                  puf_signal<=initial;                                 reset_s<='1';                                 led_s<="1111";          else              case puf_signal                     when initial=>                               reset_s<='1';                               puf_en_s<=(others=>'0');                               led_s<="0001";                               --if   uart_read_flag='1'                                 if uart_read/="11111110"                                  else                                          stop_s<='0';                                           puf_signal<=ch_i;                                                                    end if;                                --   end if;                           when ch_i =>                                 if uart_read="11111110" or uart_read="11111111"                                   else                                         ch_i_s<=(uart_read);                                          puf_signal<=ch_j;                                         led_s<="0010";                                 end if;                     when ch_j=>                                if uart_read="11111110" or uart_read="11111111" or uart_read=ch_i_s                                  else                                ch_j_s<=(uart_read);                               mux_en_s_j<=uart_read;                                puf_signal<=start;                                timer_s<=(others=>'0');                                led_s<="0011";                                 end if;                     when start=>                                 reset_s<='0';                                  if timer_start<10000                                         mux_en_s_i<=ch_i_s;                                         mux_en_s_j<=ch_j_s;                                        timer_start<=timer_start+1;                                          in 0 (ro_number) loop                                             if i=ch_i_s                                                 puf_en_s(i)<='1';                                                                 elsif i=ch_j_s                                                puf_en_s(i)<='1';                                             else                                                 puf_en_s(i)<='0';                                               end if;                                           end loop;                                                      led_s<="0100";                                 else                                          puf_signal<=finish;                                         timer_start<=0;                                         led_s<="0101";                               end if;                        when finish=>                       if timer_s<timer_max_value                               timer_s<=timer_s+'1';                                puf_en_s<=(others=>'0');                               led_s<="0100";                       else                              stop_s<='1';                               timer_s<=(others=>'0');                              led_s<="0111";                              puf_signal<=initial;                        end if;               end case;          end if;     end if; end process; 

can tel me wrong code? tested severa different approaches have error.

thanks

the main problem not in code.it correlated ring oscillators.in ring oscillators there combinational loops 0 delay , caused problem