embedded - Enabling external aborts on an ARM CPU -


from cortex-r reference manual, probably not cortex-r specific

asynchronous abort masking

the nature of asynchronous aborts means can occur while processor handling different abort. if asynchronous abort generates new exception in such situation, r14_abt , spsr_abt values overwritten. if occurs before data pushed stack in memory, state information first abort lost. prevent happening, cpsr contains mask bit, a-bit, indicate asynchronous abort cannot accepted. when a-bit set, asynchronous abort occurs held pending processor until a-bit cleared, when exception taken. a-bit automatically set when abort, irq or fiq exceptions taken, , on reset. must clear a-bit in abort handler after state information has either been stacked memory, or no longer required.

my question is, if have a bit masked since reset how can know if asynchronous abort pending? can pending external aborts cleared without unmasking a bit , taking exception? or more generally, there advice on clearing a bit after reset?

apparently in current boot chain has pending external abort (but after hard power on). enable external aborts, seems rather cumbersome special case first external abort in exception code.

on system implements security extensions, interrupt status register, isr, can tell if there's external abort pending. sadly doesn't if you're on r4 doesn't implement them.

otherwise, there's nothing can see in architecture identify or deal abort short of taking exception say. doesn't surprise me - in general external can safely ignored is special case.

if bug in system can't fixed (is bootloader probing devices in wrong order, or similar?) workaround, cumbersome, order of day - if there's reasonably straightforward way tell cold boot warm reset can imagine pretty trivial self-contained shim handle main code never needs know.


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